Course:Cadence

Instructor:  Jack Ou, Ph.D.
Office Location: Salazar Hall 2010B
Telephone: (707) 664 3462
Email:jack.ou AT sonoma DOT edu

Fundamentals:
Topic
Details
create a library
Without a tech file
create a schematic
add a custom diode
add a resistor
1n4001 diode
add a voltage source
add a ground
add wires
export schematic
as an image
create a backup
using tar
DC analysis
DC annotation
transient simulation run transient simulation, display peak-to-peak voltage of a sinusoid
DC+transient
DC + transient simulation of a common emitter

Analog/Transistor Level Design
Topic
Details
DC analysis
Obtain DC annotation
obtain DC operating point of a BJT
Determine the small signal parameter of a BJT
specify the initial condition of a capacitor
set the initial condition of a capacitor
obtain the frequency of an oscillator
Obtain the oscillator frequency
modulated oscillator
An oscillator modulated by a square wave
DC sweep
DC sweep of an inverter
design variables
use design variables in simulation
display dc voltage
display dc voltage in ADE
DC operating point of ALD transistors
Display small signal parameters of ALD transistors (ALD 1106/ALD1107)
Use ALD transistors
Use ALD1106/1107 transistors in simulation

Verilog Simulation:
Topic
Comments
Running the verilog in GUI mode
Detect a zero after a string of ones.
Logic synthesis
Logic synthesis using Encounter